Very low leakage current: nA max. The very low line capacitance secures a high level of signal integrity without compromising in protecting sensitive chips against the most stringent characterized ESD strikes. Figure 1. Relative variation of leakage current versus junction temperature typical values Figure 5. It is for this reason that some recommendations have to be followed see 2. Figure 6.
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The very low line capacitance secures a high level of signal integrity without compromising in protection sensitive chips against the most stringent characterized ESD strikes.
The add of this capacitance will allow a better protection by providing during surge a constant voltage. The figures 8, 9 and 10 show the improvement of the ESD protection according to the recommendations described above. This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line.
The perturbed line will be more affected if it works with low voltage signal or high load impedance few k? Figure 12 gives the measurement circuit for the analog application. In usual frequency range of analog signals up to MHz the effect on disturbed line is less than dB please see figure Inches Min. A Millimeters Min.
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USBLC6-2SC6 STMicroelectronics, USBLC6-2SC6 Datasheet
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